1. Field of the Invention
The present invention relates to a non-volatile memory device having an SiO.sub.2 /Si laminated structure, in which nano crystals are formed in the SiO.sub.2 layer using an atomic force microscope (AFM) and an ion implantation process, thereby being capable of operating in the same manner as EEPROM's while having a reduced size. The present invention also relates to a non-volatile memory device including an AFM tip consisting of a thin film made of a ferroelectric material (for example, PZT-PbZrxTi-xO.sub.2, SBT-SrBi.sub.2 Ta.sub.2 O.sub.9, etc.) and a metal layer coated over the thin film, thereby being capable of operating in a manner similar to FRAM's while having a reduced size.
2. Description of the Prior Art
By virtue of recent rapid developments of electronic techniques, many electronic appliances have been developed and are deeply involved in modern society. It is believed that such rapid developments of electronic techniques result from developments of semiconductor techniques progressed after the development of transistors.
In order to satisfy recent demands for portable electronic appliances having a reduced size while having an increased number of functions, a variety of techniques have been proposed. In particular, the degree of integration of semiconductor memory devices has reached to a considerably high level, approaching a limit. In other words, current techniques have a limitation in how much more they are able to increase the degree of integration of semiconductor memory devices.
Semiconductor memory devices should basically perform read, write and erase operations. In accordance with current semiconductor memory fabrication techniques, each memory cell of such semiconductor memory devices basically includes a capacitor adapted to accumulate voltage of a certain level and a transistor adapted to form a charge or discharge path for the voltage accumulated in the capacitor in accordance with a control signal applied thereto. Due to such a basic memory cell configuration, there is a limitation in reducing the basic size of semiconductor memory devices using known techniques.
Accordingly, there is a problem in that it is impossible to provide semiconductor memory devices having a reduced size and an increased memory capacity as compared to those currently developed, unless a revolution of semiconductor techniques is made.